标准摘要
[中文适用范围]： 指定高性能背板总线，包括四个子总线：数据传输总线、优先级中断总线、仲裁总线和实用总线。 [外文原描述]： Describes a high-performance backplane bus for use in microprocessor bases systems. This parallel bus supports single- and block-transfer cycles on a 32-bit non-multiplexed address and data highway. Transmission is governed by an asynchronous handshaken protocol. The bus allocation provides for multiprocessor architectures. This bus also supports inter-module interrupts for facilitating quick response to internal and external events. The mechanics of the boards and chassis are based on IEC 60297. Note: -1.This bus is similar to the VME bus. 2.For the price of this publication, please consult the ISO/IEC price-code list.
英文名称VMEbus - Microprocessor system bus for 1 byte to 4 byte data