行为语言.第4部分:Verilog?硬件描述语言

[中文适用范围]： 包含所有 Verilog HDL 结构的形式语法和语义；标准延迟格式 (SDF) 构造的形式语法和语义；模拟系统任务和功能，如文本输出显示命令；编译器指令，例如 t [外文原描述]： Contains the formal syntax and semantics of all Verilog HDL constructs; the formal syntax and semantics of Standard Delay Format (SDF) constructs; simulation system tasks and functions,such as text output display commands; compiler directives,such as text substitution macros and simulation time scaling; the Programming Language Interface (PLI) binding mechanism; the formal syntax and semantics of access routines,task/function routines,and Verilog procedural interface routines; informative usage examples; informative delay model for SDF; listings of header files for PLI This publication has the status of a double logo IEEE/IEC standard