标准摘要
[中文适用范围]: IEC 62433 的这一部分指定了 IC 的宏观模型,用于模拟印刷电路板上的传导电磁发射。该模型通常称为集成电路发射模型 - 传导发射 (ICEM-CE)。 ICEM-CE 模型还可用于对 IC 芯片、功能块和知识产权块 (IP) 进行建模。 ICEM-CE 模型可用于对数字和模拟 IC 进行建模。基本上,传导发射有两个来源: ~ 通过电源端子和接地参考结构的传导发射; ~ 通过输入/输出 (1/O) 端子传导发射。 ICEM-CE 模型通过单一方法解决了这两种类型的起源。该标准定义了 EMI 仿真宏观模型的结构和组件,同时考虑了 IC 的内部活动。该标准提供了通用数据,可以用不同的格式或语言实现,例如IBIS、IMIC、SPICE、VHDL-AMS和Verilog。然而,SPICE 被选为默认模拟环境,以涵盖所有传导发射。本标准还规定了每个ICEM-CE模型或模型组成部分中应包含的信息要求,以供模型流通,但描述语法不在本标准的范围内。 [外文原描述]: IEC 62433-2:2008 specifies macro-models for ICs to simulate conducted electromagnetic emissions on a printed circuit board. The model is commonly called Integrated Circuit Emission Model - Conducted Emission (ICEM-CE). The ICEM-CE model can also be used for modelling an IC-die, a functional block and an Intellectual Property block (IP). The ICEM-CE model can be used to model both digital and analogue ICs. Basically, conducted emissions have two origins: - conducted emissions through power supply terminals and ground reference structures; - conducted emissions through input/output (I/O) terminals. The ICEM-CE model addresses those two types of origins in a single approach. This standard defines structures and components of the macro-model for EMI simulation taking into account the IC's internal activities. This standard gives general data, which can be implemented in different formats or languages such as IBIS, IMIC, SPICE, VHDL-AMS and Verilog. SPICE is however chosen as default simulation environment to cover all the conducted emissions. This standard also specifies requirements for information that shall be incorporated in each ICEM-CE model or component part of the model for model circulation, but description syntax is not within the scope of this standard.
英文名称EMC IC modelling - Part 2: Models of integrated circuits for EMI behavioural simulation - Conducted emissions modelling (ICEM-CE)