电化学阻抗谱(EIS)涂层和无涂层的金属试样的第3部分:从虚拟细胞的数据处理与分析(ISO 16773-3:2016)

[中文适用范围]： ISO 16773 的这一部分指定了一种评估在高阻抗涂层样品上执行电化学阻抗谱 (EIS) 的实验装置的方法。 模拟涂层高阻抗样品的测试电路用于此目的。 基于所描述的等效电路，ISO 16773 的这一部分提供了有关使用测试电路的指南，以提高测试报告陈述在测量、曲线拟合和数据表示方面的可信度。 注：由于测量的性质，高阻抗涂层样品的研究更容易受到电磁干扰的影响。 因此，ISO 16773 的这一部分考虑了通过法拉第笼中适当的测试电路测量高阻抗样品的方面。 尽管如此，大多数制造商都提供低阻抗和中阻抗范围的补充测试电路。 这允许检查与低阻抗区域相关的测量设置。 [外文原描述]： ISO 16773-3:2016 specifies a procedure for the evaluation of the experimental set-up used for carrying out EIS on high-impedance coated samples. For this purpose, dummy cells are used to simulate high-impedance coated samples. On the basis of the equivalent circuits described, this part of ISO 16773 gives guidelines for the use of dummy cells to increase confidence in the test protocol, including making measurements, curve fitting and data presentation. NOTE Due to the nature of the measurements, investigations of high-impedance coated samples are more susceptible to artefacts coming from electromagnetic interferences. Therefore, this part of ISO 16773 considers the aspects for measuring high-impedance samples by using appropriate dummy cells in a Faraday cage. However, most manufacturers offer complementary dummy cells in the low and medium impedance range. This allows checking the setup in the respective low impedance range.